Abstract
Segmented sort, as a generalization of classical sort, orders a batch of independent segments in a whole array. Along with the wider adoption of manycore processors for HPC and big data applications, segmented sort plays an increasingly important role than sort. In this paper, we present an adaptive segmented sort mechanism on GPUs. Our mechanisms include two core techniques: (1) a differentiated method for different segment lengths to eliminate the irregularity caused by various workloads and thread divergence; and (2) a register-based sort method to support N-to-M data-thread binding and in-register data communication. We also implement a shared memory-based merge method to support non-uniform length chunk merge via multiple warps. Our segmented sort mechanism shows great improvements over the methods from CUB, CUSP and ModernGPU on NVIDIA K80-Kepler and TitanX-Pascal GPUs. Furthermore, we apply our mechanism on two applications, i.e., sufix array construction and sparse matrix-matrix multiplication, and obtain obvious gains over state-of-the-art implementations.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the International Conference on Supercomputing 17 |
| Volume | 12 |
| Place of Publication | Chicago, USA |
| Publication date | 14 Jun 2017 |
| Edition | ACM |
| ISBN (Electronic) | 978-1-4503-5020-4 |
| DOIs | |
| Publication status | Published - 14 Jun 2017 |