Fast segmented sort on GPUs

TY - GEN

T1 - Fast segmented sort on GPUs

AU - Hou, Kaixi

AU - Liu, Weifeng

AU - Wang, Hao

AU - Feng, Wu-Chun

PY - 2017/6/14

Y1 - 2017/6/14

N2 - Segmented sort, as a generalization of classical sort, orders a batch of independent segments in a whole array. Along with the wider adoption of manycore processors for HPC and big data applications, segmented sort plays an increasingly important role than sort. In this paper, we present an adaptive segmented sort mechanism on GPUs. Our mechanisms include two core techniques: (1) a differentiated method for different segment lengths to eliminate the irregularity caused by various workloads and thread divergence; and (2) a register-based sort method to support N-to-M data-thread binding and in-register data communication. We also implement a shared memory-based merge method to support non-uniform length chunk merge via multiple warps. Our segmented sort mechanism shows great improvements over the methods from CUB, CUSP and ModernGPU on NVIDIA K80-Kepler and TitanX-Pascal GPUs. Furthermore, we apply our mechanism on two applications, i.e., sufix array construction and sparse matrix-matrix multiplication, and obtain obvious gains over state-of-the-art implementations.

AB - Segmented sort, as a generalization of classical sort, orders a batch of independent segments in a whole array. Along with the wider adoption of manycore processors for HPC and big data applications, segmented sort plays an increasingly important role than sort. In this paper, we present an adaptive segmented sort mechanism on GPUs. Our mechanisms include two core techniques: (1) a differentiated method for different segment lengths to eliminate the irregularity caused by various workloads and thread divergence; and (2) a register-based sort method to support N-to-M data-thread binding and in-register data communication. We also implement a shared memory-based merge method to support non-uniform length chunk merge via multiple warps. Our segmented sort mechanism shows great improvements over the methods from CUB, CUSP and ModernGPU on NVIDIA K80-Kepler and TitanX-Pascal GPUs. Furthermore, we apply our mechanism on two applications, i.e., sufix array construction and sparse matrix-matrix multiplication, and obtain obvious gains over state-of-the-art implementations.

U2 - 10.1145/3079079.3079105

DO - 10.1145/3079079.3079105

M3 - Article in proceedings

VL - 12

BT - Proceedings of the International Conference on Supercomputing 17

CY - Chicago, USA

ER -