A reversible processor architecture and its reversible logic design

Michael Kirkedal Thomsen; Holger Bock Axelsen; Robert Glück

doi:10.1007/978-3-642-29517-1_3

A reversible processor architecture and its reversible logic design

Michael Kirkedal Thomsen, Holger Bock Axelsen, Robert Glück

Datalogisk Institut

14 Citationer (Scopus)

Abstract

We describe the design of a purely reversible computing architecture, Bob, and its instruction set, BobISA. The special features of the design include a simple, yet expressive, locally-invertible instruction set, and fully reversible control logic and address calculation. We have designed an architecture with an ISA that is expressive enough to serve as the target for a compiler from a high-level structured reversible programming language.

All-in-all, this paper demonstrates that the design of a complete reversible computing architecture is possible and can serve as the core of a programmable reversible computing system.

Originalsprog	Engelsk
Titel	Reversible Computation : Third International Workshop, RC 2011, Gent, Belgium, July 4-5, 2011. Revised Papers
Redaktører	Alexis De Vos, Robert Wille
Antal sider	13
Forlag	Springer
Publikationsdato	2012
Sider	30-42
ISBN (Trykt)	978-3-642-29516-4
ISBN (Elektronisk)	978-3-642-29517-1
DOI	https://doi.org/10.1007/978-3-642-29517-1_3
Status	Udgivet - 2012
Begivenhed	3rd International Workshop on Reversible Computation - Gent, Belgien Varighed: 4 jul. 2011 → 5 jul. 2011 Konferencens nummer: 3

Konference

Konference	3rd International Workshop on Reversible Computation
Nummer	3
Land/Område	Belgien
By	Gent
Periode	04/07/2011 → 05/07/2011

Navn	Lecture notes in computer science
Vol/bind	7165
ISSN	0302-9743

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10.1007/978-3-642-29517-1_3

Citationsformater

A reversible processor architecture and its reversible logic design. / Thomsen, Michael Kirkedal; Axelsen, Holger Bock; Glück, Robert.
Reversible Computation: Third International Workshop, RC 2011, Gent, Belgium, July 4-5, 2011. Revised Papers. red. / Alexis De Vos; Robert Wille. Springer, 2012. s. 30-42 (Lecture notes in computer science, Bind 7165).

Publikation: Bidrag til bog/antologi/rapport › Konferencebidrag i proceedings › Forskning › peer review

Thomsen, MK, Axelsen, HB & Glück, R 2012, A reversible processor architecture and its reversible logic design. i A De Vos & R Wille (red), Reversible Computation: Third International Workshop, RC 2011, Gent, Belgium, July 4-5, 2011. Revised Papers. Springer, Lecture notes in computer science, bind 7165, s. 30-42, 3rd International Workshop on Reversible Computation, Gent, Belgien, 04/07/2011. https://doi.org/10.1007/978-3-642-29517-1_3

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A reversible processor architecture and its reversible logic design

Abstract

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