Abstract
This paper presents a real-world pricing kernel for financial derivatives and evaluates the language and compiler tool chain that would allow expressive, hardware-neutral algorithm implementation and efficient execution on graphics-processing units (GPU). The language issues refer to preserving algorithmic invariants, e.g., inherent parallelism made explicit by map-reduce-scan functional combinators. Efficient execution is achieved by manually; applying a series of generally-applicable compiler transformations that allows the generated-OpenCL code to yield speedups as high as 70x and 540x on a commodity mobile and desktop GPU, respectively. Apart from the concrete speed-ups attained, our contributions are twofold: First, from a language perspective;, we illustrate that even state-of-the-art auto-parallelization techniques are incapable of discovering all the requisite data parallelism when rendering the functional code in Fortran-style imperative array processing form. Second, from a performance perspective;, we study which compiler transformations are necessary to map the high-level functional code to hand-optimized OpenCL code for GPU execution. We discover a rich optimization space with nontrivial trade-offs and cost models. Memory reuse in map-reduce patterns, strength reduction, branch divergence optimization, and memory access coalescing, exhibit significant impact individually. When combined, they enable essentially full utilization of all GPU cores. Functional programming has played a crucial double role in our case study: Capturing the naturally data-parallel structure of the pricing algorithm in a transparent, reusable and entirely hardware-independent fashion; and supporting the correctness of the subsequent compiler transformations to a hardware-oriented target language by a rich class of universally valid equational properties. Given the observed difficulty of automatically parallelizing imperative sequential code and the inherent labor of porting hardware-oriented and -optimized programs, our case study suggests that functional programming technology can facilitate high-level; expression of leading-edge performant portable; high-performance systems for massively parallel hardware architectures.
Original language | English |
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Title of host publication | FHPC’12 : Proceedings of the 1st ACM SIGPLAN Workshop on Functional High Performance Computing |
Number of pages | 12 |
Publisher | Association for Computing Machinery |
Publication date | 2012 |
Pages | 61-72 |
ISBN (Print) | 978-1-4503-1577-7 |
DOIs | |
Publication status | Published - 2012 |
Event | 1st ACM SIGPLAN Workshop on Functional High-Performance Computing - København, Denmark Duration: 15 Sept 2012 → 15 Sept 2012 Conference number: 1 |
Conference
Conference | 1st ACM SIGPLAN Workshop on Functional High-Performance Computing |
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Number | 1 |
Country/Territory | Denmark |
City | København |
Period | 15/09/2012 → 15/09/2012 |
Keywords
- autoparallelization, functional language, memory coalescing, strength reduction, tiling