Abstract
Reversible logic is a computational model where all gates are logically reversible and combined in circuits such that no values are lost or duplicated. This paper presents a novel functional language that is designed to describe only reversible logic circuits. The language includes high-level constructs such as conditionals and a let-in statement that can be used to locally change wires that are otherwise considered to be constant. Termination of recursion is restricted by size-change termination; it must be guaranteed that all recursive calls will be to a strictly smaller circuit size. Reversibility of descriptions is guaranteed with a type system based on linear types. The language is applied to three examples of reversible computations (ALU, linear cosine transformation, and binary adder).
The paper also outlines a design flow that ensures garbage- free translation to reversible logic circuits. The flow relies on a reversible combinator language as an intermediate language.
The paper also outlines a design flow that ensures garbage- free translation to reversible logic circuits. The flow relies on a reversible combinator language as an intermediate language.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2012 Forum on Specification and Design Languages |
| Editors | Adam Morawiec, Jinnie Hinderscheit |
| Number of pages | 8 |
| Publisher | IEEE |
| Publication date | 2012 |
| Pages | 135-142 |
| ISBN (Print) | 978-1-4673-1240-0 |
| ISBN (Electronic) | 978-2-9530504-5-5 |
| Publication status | Published - 2012 |
| Event | 2012 Forum on specification & Design Languages - Vienna, Austria Duration: 18 Sept 2012 → 20 Sept 2012 |
Conference
| Conference | 2012 Forum on specification & Design Languages |
|---|---|
| Country/Territory | Austria |
| City | Vienna |
| Period | 18/09/2012 → 20/09/2012 |