Interfacing reversible pass-transistor CMOS chips with conventional restoring CMOS circuits

TY - GEN

T1 - Interfacing reversible pass-transistor CMOS chips with conventional restoring CMOS circuits

AU - Burignat, Stéphane

AU - Thomsen, Michael Kirkedal

AU - Klimczak, Michał

AU - Olczak, Mariusz

AU - De Vos, Alexis

N1 - Conference code: 3

PY - 2012

Y1 - 2012

N2 - Recent progress on the prototyping of reversible digital circuits, have shown that adiabatic reversible dual-line pass-transistor logic can be used for special purpose applications in reversible computation. This, however, raises new issues regarding the compatibility between this adiabatic logic implementation and conventional CMOS logic. The greatest difficulty is brought by the difference in signal shape used by these two logic families. Whereas standard switching CMOS circuits are operated by rectangular pulses, dual-line pass-transistor reversible circuits are controlled by triangular or trapezoidal signals to ensure adiabatic switching of the transistors. This work proposes a simple technical solution that allows interfacing reversible pass-transistor logic with conventional CMOS logic, represented here by an FPGA embedded in a commercial Xilinx Spartan-3E board. All proposed solutions have successfully been tested, which enables the FPGA to perform calculations directly on a reversible chip.

AB - Recent progress on the prototyping of reversible digital circuits, have shown that adiabatic reversible dual-line pass-transistor logic can be used for special purpose applications in reversible computation. This, however, raises new issues regarding the compatibility between this adiabatic logic implementation and conventional CMOS logic. The greatest difficulty is brought by the difference in signal shape used by these two logic families. Whereas standard switching CMOS circuits are operated by rectangular pulses, dual-line pass-transistor reversible circuits are controlled by triangular or trapezoidal signals to ensure adiabatic switching of the transistors. This work proposes a simple technical solution that allows interfacing reversible pass-transistor logic with conventional CMOS logic, represented here by an FPGA embedded in a commercial Xilinx Spartan-3E board. All proposed solutions have successfully been tested, which enables the FPGA to perform calculations directly on a reversible chip.

U2 - 10.1007/978-3-642-29517-1_10

DO - 10.1007/978-3-642-29517-1_10

M3 - Article in proceedings

SN - 978-3-642-29516-4

T3 - Lecture notes in computer science

SP - 112

EP - 122

BT - Reversible Computation

A2 - De Vos, Alexis

A2 - Wille, Robert

PB - Springer

T2 - 3rd International Workshop on Reversible Computation

Y2 - 4 July 2011 through 5 July 2011

ER -